ALU and related nodes, Registers - Informatics

ALU and related nodes

The Arithmetic Logic Unit performs processing of the 8-bit operands using the appropriate commands (see paragraph 4.6). When performing the operations, one of the operands enters the ALU through the accumulator A and the additional register 1, the other operand through the additional register 2. The cyclic shifts are performed only over the contents of the accumulator A. Also, the results of the operations performed in the ALU are placed.

The decimal correction block is used to detect and correct the wrong result when summing the decimal numbers (see paragraph 2.3).

The Characteristics register is intended for fixing the result of execution of some arithmetic and logical operations in the form:

• Transfer signal C = 1 from the highest 8th digit when performing addition or shift operations;

• Additional transfer signal V = 1 to the 5th bit when performing operations with binary-decimal codes;

• Zero signal Z = 1, if the result of the operation is zero;

• sign signal S (0 or 1) in the highest digit of the operand;

• the parity check signal P, used to detect errors.

The listed signals, also called flags, indicate the execution/failure of logical conditions and implement conditional transitions in the program.


Access to the registers, including the instruction counter and the stack pointer, is done via the multiplexers using the register selector. The general purpose registers (RON) play the role of accumulators, when they contain processed data, or pointers, when they store the addresses of the operands. Registers B, C, D, E, H, L can be used in the program as separate 8-bit registers or as 16-bit register pairs BC, DE, HL. The registers W and Z are not software-accessible and are used to execute commands within the microprocessor. They store the second and third byte of the command. The exchange of information between the microprocessor and external devices is carried out via a bi-directional buffer register, and addressing to memory and external devices is via a 16-bit address register.

Command counter (program counter) indicates the address where the next byte of the command is in memory (for commands 3-byte formats are used, see paragraph 5.4). Command bytes are usually selected in order of increasing their addresses. Therefore, after sampling from the main memory of each next byte, the contents of the instruction counter are incremented by one. In the process of retrieving a 3-byte instruction, the contents of the counter are incremented three times. The usual order of addresses can be changed, for example, with conditional transitions. To do this, the counter provides the ability to record the initial address of that part of the program, called the subroutine which must be executed.

Stack pointer (Stack Pointer - SP). The stack pointer is a 16-bit register intended for addressing a special type of memory called the stack. The contents of the accumulator, register of attributes, RON, the return address to the interrupted program are stored on the stack for the time of processing by the microprocessor of the subroutine. Exchange with the stack is made by two-byte words, for storage of which two adjacent cells are allocated. Exchange features for the case when the stack pointer ( SP ) stores the address A, are illustrated in Fig. 5.2. When you enter information into the stack (Fig. 5.2, a) , the value SP decreases by one and the high byte (SB) is placed at the address A , and then the SP value decreases again by one, and the lower byte (MB) arrives at the address A-2 , etc. The address of the last cell occupied by the stack will be stored in the stack pointer. The output of the information (Figure 5.2, b) from the stack begins with the cell whose address is stored in the stack pointer (for the case under consideration - SP = A). After the output of the first MB, the value of SP is incremented by one and the SB is output to the address A + 1. After reading the SB, the value SP again increases by one, etc., i.e. the stack pointer SP does not remain on the read cell. Thus,

Illustration of the operating principle of the stack

Fig. 5.2. Illustration of the principle of the stack

stack memory is characterized by the fact that it is accessed by the principle: the first to select the data that came last.

thematic pictures

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