Minimization of not completely defined logical functions, Minimization...

Minimizing not fully defined logic functions

There is a class of logical functions whose values ​​Y = Y * are defined (defined) only on the part of the sets (k = 0, ..., M - 1) variables . Such functions are called not fully or partially defined. The sets on which the logical function is defined are called working, and which are not defined - indifferent sets. In practice, indifferent sets correspond to sets of input signals that are never implemented in a combinational device. The value of the function Y * corresponding to the indifferent set will be denoted on the Carnot map or in the truth table by the symbol Φ, since its value can be set to 0 or 1. Usually a partially defined function is defined in such a way as to obtain the simplest minimal form. To do this, when marking Carnot maps, the group includes those cells marked with the symbol Φ, which expand the unions and reduce their number. An example of minimizing a partially defined logic function is shown in Fig. 3.9.

Example of minimizing an incompletely defined boolean function

Fig. 3.9. Example of minimizing an incompletely defined boolean function

Minimizing the aggregate of logical functions

Such a problem arises in the structural synthesis of a combinational device with many outputs, which makes it possible to realize the logical functions Kj, Y n, ..., Y N _ t, the number of which is equal to the number N of the device outputs. The features of minimization for this case are as follows:

• the number of Carnot maps is equal to the number of N outputs, since each of the functions Y n is minimized using its map;

• When marking, they tend to select identical areas on as many cards as possible. Each such area in the readout is represented by a conjunctive term and is implemented as a logical element that serves The outputs related to these cards.

Minimized boolean functions are written in the form


where Z * are terms common to the function Vq from the whole collection z1, ..., Z *, ..., Z K.

The representation of minimized logical functions in the form (3.18) greatly simplifies the circuit solution, since the common terms Z1, ..., Z k, ..., Z K are realized once for the entire combination device. An example of minimizing two logical functions is shown in Fig. 3.10, from which it follows that the logical multiplication element X 3 X 2 X 1 serves both outputs (Y, and Y0) of the combination device.

Example of minimizing two logical functions

Fig. 3.10. Example of minimizing two logical functions

thematic pictures

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